Technical Documents
Specifications
Brand
Renesas ElectronicsMemory Size
8kB
Product Type
FIFO Memory
Organisation
1024 x 9 bit
Data Bus Width
9bit
Access Time
15ns
Mount Type
Surface
Maximum Clock Frequency
40MHz
Minimum Supply Voltage
3V
Package Type
PLCC
Timing Type
Asynchronous
Pin Count
32
Maximum Supply Voltage
3.6V
Minimum Operating Temperature
0°C
Bus Direction
Uni-Directional
Maximum Operating Temperature
70°C
Height
2.79mm
Length
13.97mm
Standards/Approvals
No
Width
11.4mm
Series
72V02
Number of Bits per Word
9
Supply Current
60mA
Automotive Standard
No
Number of Words
1K
Product Details
The Renesas Electronics 72V02 is a 1K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
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Stock information temporarily unavailable.
Standard
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Technical Documents
Specifications
Brand
Renesas ElectronicsMemory Size
8kB
Product Type
FIFO Memory
Organisation
1024 x 9 bit
Data Bus Width
9bit
Access Time
15ns
Mount Type
Surface
Maximum Clock Frequency
40MHz
Minimum Supply Voltage
3V
Package Type
PLCC
Timing Type
Asynchronous
Pin Count
32
Maximum Supply Voltage
3.6V
Minimum Operating Temperature
0°C
Bus Direction
Uni-Directional
Maximum Operating Temperature
70°C
Height
2.79mm
Length
13.97mm
Standards/Approvals
No
Width
11.4mm
Series
72V02
Number of Bits per Word
9
Supply Current
60mA
Automotive Standard
No
Number of Words
1K
Product Details
The Renesas Electronics 72V02 is a 1K x 9 dual-port FIFO that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
