Technical Documents
Specifications
Brand
onsemiProduct Type
Shift Register
Package Type
TSSOP
Logic Family
74HC
Mount Type
Surface
Number of Elements
1
Minimum Supply Voltage
2V
Pin Count
16
Maximum Supply Voltage
6V
Maximum Operating Temperature
125°C
Standards/Approvals
No
Width
4.5mm
Series
MC74HC165A
Length
5.1mm
Height
1.2mm
Automotive Standard
AEC-Q100
Country of Origin
Philippines
Product Details
The MC74HC165A is identical in pin out to the LS165. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs. This device is an 8-bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/Parallel Load(bar) input is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Load(bar) input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit. The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.
Stock information temporarily unavailable.
€ 20.99
€ 0.21 Each (In a Pack of 100) (Exc. VAT)
Standard
100
€ 20.99
€ 0.21 Each (In a Pack of 100) (Exc. VAT)
Stock information temporarily unavailable.
Standard
100
| Quantity | Unit price | Per Pack |
|---|---|---|
| 100 - 400 | € 0.21 | € 20.99 |
| 500 - 900 | € 0.181 | € 18.11 |
| 1000+ | € 0.157 | € 15.72 |
Technical Documents
Specifications
Brand
onsemiProduct Type
Shift Register
Package Type
TSSOP
Logic Family
74HC
Mount Type
Surface
Number of Elements
1
Minimum Supply Voltage
2V
Pin Count
16
Maximum Supply Voltage
6V
Maximum Operating Temperature
125°C
Standards/Approvals
No
Width
4.5mm
Series
MC74HC165A
Length
5.1mm
Height
1.2mm
Automotive Standard
AEC-Q100
Country of Origin
Philippines
Product Details
The MC74HC165A is identical in pin out to the LS165. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs. This device is an 8-bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/Parallel Load(bar) input is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Load(bar) input is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit. The 2-input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.