Technical Documents
Specifications
Brand
MicrochipProduct Type
DSP
Package Type
TQFP
Mount Type
Surface
Pin Count
80
Device Core
dsPIC
Data Bus Width
16bit
Program Memory Size
144kB
Interface Type
SBI, UART, CAN
RAM Size
8192bit
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
No
Minimum Supply Voltage
2.5V
Automotive Standard
No
ADCs
12 bit
Program Memory Type
FLASH
Instruction Set Architecture
Harvard
Number of Timers
5
Product Details
The Microchip dsPIC30F6014A series have a modified Harvard architecture, a C compiler optimized instruction set architecture and flexible addressing modes. The device is able to perform dual data fetch modulo and bit-reversed modes. The devices CMOS technology offers low-power, high-speed flash operations. It has industrial and extended temperature ranges and low power consumption . The Fail-safe clock monitor operation detects clock failure and switches to on-chip low-power RC oscillator. The device offers programmable code protection and In-circuit serial programming (ICSP) and also selectable power management modes which are sleep, Idle and alternate clock modes.
Stock information temporarily unavailable.
€ 1,418.15
€ 11.917 Each (In a Tray of 119) (Exc. VAT)
119
€ 1,418.15
€ 11.917 Each (In a Tray of 119) (Exc. VAT)
Stock information temporarily unavailable.
119
| Quantity | Unit price | Per Tray |
|---|---|---|
| 119 - 119 | € 11.917 | € 1,418.15 |
| 238+ | € 11.619 | € 1,382.66 |
Technical Documents
Specifications
Brand
MicrochipProduct Type
DSP
Package Type
TQFP
Mount Type
Surface
Pin Count
80
Device Core
dsPIC
Data Bus Width
16bit
Program Memory Size
144kB
Interface Type
SBI, UART, CAN
RAM Size
8192bit
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Standards/Approvals
No
Minimum Supply Voltage
2.5V
Automotive Standard
No
ADCs
12 bit
Program Memory Type
FLASH
Instruction Set Architecture
Harvard
Number of Timers
5
Product Details
The Microchip dsPIC30F6014A series have a modified Harvard architecture, a C compiler optimized instruction set architecture and flexible addressing modes. The device is able to perform dual data fetch modulo and bit-reversed modes. The devices CMOS technology offers low-power, high-speed flash operations. It has industrial and extended temperature ranges and low power consumption . The Fail-safe clock monitor operation detects clock failure and switches to on-chip low-power RC oscillator. The device offers programmable code protection and In-circuit serial programming (ICSP) and also selectable power management modes which are sleep, Idle and alternate clock modes.