Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Logic Gate
Logic Function
Multifunction
Mount Type
Surface
Number of Elements
1
Number of Inputs per Gate
3
Schmitt Trigger Input
Yes
Package Type
SC-70
Pin Count
6
Logic Family
LVC
Input Type
Schmitt Trigger
Maximum Propagation Delay Time @ CL
6.1ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Minimum Supply Voltage
1.65V
Width
1.25 mm
Series
SN74
Maximum Supply Voltage
5.5V
Height
0.9mm
Length
2mm
Standards/Approvals
No
Maximum Low Level Output Current
32mA
Automotive Standard
No
Output Type
CMOS
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
€ 1.34
€ 0.134 Each (In a Pack of 10) (Exc. VAT)
Standard
10
€ 1.34
€ 0.134 Each (In a Pack of 10) (Exc. VAT)
Stock information temporarily unavailable.
Standard
10
| Quantity | Unit price | Per Pack |
|---|---|---|
| 10 - 40 | € 0.134 | € 1.34 |
| 50 - 90 | € 0.127 | € 1.27 |
| 100 - 240 | € 0.114 | € 1.14 |
| 250 - 490 | € 0.102 | € 1.02 |
| 500+ | € 0.098 | € 0.98 |
Technical Document
Specifications
Brand
Texas InstrumentsProduct Type
Logic Gate
Logic Function
Multifunction
Mount Type
Surface
Number of Elements
1
Number of Inputs per Gate
3
Schmitt Trigger Input
Yes
Package Type
SC-70
Pin Count
6
Logic Family
LVC
Input Type
Schmitt Trigger
Maximum Propagation Delay Time @ CL
6.1ns
Minimum Operating Temperature
-40°C
Maximum High Level Output Current
-32mA
Maximum Operating Temperature
85°C
Minimum Supply Voltage
1.65V
Width
1.25 mm
Series
SN74
Maximum Supply Voltage
5.5V
Height
0.9mm
Length
2mm
Standards/Approvals
No
Maximum Low Level Output Current
32mA
Automotive Standard
No
Output Type
CMOS
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22


