Texas Instruments SN74LVC1G11DSFR 3-Input AND Logic Gate, 6-Pin SON
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
3
Schmitt Trigger Input
No
Package Type
SON
Pin Count
6
Logic Family
LVC
Input Type
Differential
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-4mA
Maximum Propagation Delay Time @ Maximum CL
20 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
0.35mm
Width
1.05mm
Dimensions
1.05 x 1.05 x 0.35mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
1.05mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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Stock information temporarily unavailable.
Price on asking
Each (Supplied on a Reel) (Exc. VAT)
Production pack (Reel)
20
Price on asking
Each (Supplied on a Reel) (Exc. VAT)
Stock information temporarily unavailable.
Production pack (Reel)
20
Ideate. Create. Collaborate
JOIN FOR FREE
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
3
Schmitt Trigger Input
No
Package Type
SON
Pin Count
6
Logic Family
LVC
Input Type
Differential
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-4mA
Maximum Propagation Delay Time @ Maximum CL
20 ns @ 50 pF
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
0.35mm
Width
1.05mm
Dimensions
1.05 x 1.05 x 0.35mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Output Type
Single Ended
Length
1.05mm
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products