Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
Number of Channels per Chip
1
IC Type
Buffer & Line Driver IC
Input Type
Single Ended
Output Type
Open Drain
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns@ 30 pF
Dimensions
3.05 x 1.75 x 1.3mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
5.5 V
Propagation Delay Test Condition
30pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
Price on asking
Each (Supplied on a Reel) (Exc. VAT)
Production pack (Reel)
15
Price on asking
Each (Supplied on a Reel) (Exc. VAT)
Stock information temporarily unavailable.
Production pack (Reel)
15
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Driver
Number of Channels per Chip
1
IC Type
Buffer & Line Driver IC
Input Type
Single Ended
Output Type
Open Drain
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
7 ns@ 30 pF
Dimensions
3.05 x 1.75 x 1.3mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Supply Voltage
5.5 V
Propagation Delay Test Condition
30pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
